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Digital Principles and Systems Design CS2202 Important questions for nov/dec 2012 exams - anna university,chennai

Written By Anonymous on Monday, December 10, 2012 | 12/10/2012

Anna University,Chennai Nov/Dec 2012 Examinations

Rejinpaul.com Important Questions

Digital Principles and Systems Design CS2202

UNIT I-V

1.     Reduce the expression using Quine McCluskey method F(x1,x2,x3,x4,x5)=âˆ'm(0, 2,4,5,6,7,8,10,14,17,18,21,29,31) + âˆ'd (11, 20, 22)

2.     Explain the conversion of regular expression into canonical expression and their simplification in SOP and POS forms

3.     Determine the minterm sum of product form of the switching function F = âˆ' (0, 1, 4, 5, 6, 11, 14, 15, 16, 17, 20,21,22, 30, 32, 33, 36, 37, 48, 49, 52,53, 59, 63)

4.     Using Tabulation method simplify the Boolean function F(w, x, y, z) =  âˆ' (1, 2, 3, 5, 9, 12, 14, 15) which has the don’t care condition d(4, 8, 11)

5.     With a suitable block diagram explain the operation of BCD adder

6.     Draw and explain the working of a carry-look ahead adder

7.      A circuit receives only valid 5211 or 8421 BCD information and provides two output lines X and Y Design the circuit such that X will provide an output anytime a valid 8421 BCD code appears at the input and Y will provide an output anytime a valid 5211 BCD code appears at the input

8.     Design Full adder and subtractor circuits using NAND and NOR gates respectively

9.     Implement the switching function z1=ab’d’e+a’b’c’d’e’+bc+de, z2==a’c’e, z3=bc+de+c’d’e’+bd, z4==a’c’e+ce using 5X8X4 programmable logic array

10.Explain with necessary diagram a BCD to 7 segment display decoder

11.Design a 3 to 8-line decoder with necessary diagram

12.Implement a full adder with two 4*1 multiplexers

13.Write the HDL for the above circuit

14.Design MOD 6 synchronous sequential circuit using JK flipflip

15.Design and explain the working of a up-down ripple counter

16.Design a synchronous sequential circuit using JK flip-flop to generate the following sequence and repeat.  0, 1, 2, 4, 5,

17.With suitable example and diagram explain the hazards in combinational and sequential logic circuits

18.Design  the Tflip flop from the logic gates  

19.Design a non sequential ripple counter which will go through the states        3,4,5,7,8,9,10,3,4………………..draw bush diagram

20.                   Find a circuit that has no static hazards and implements the Boolean function F(A,B,C,D)=âˆ'  m(1,3,5,7,8,9,14,15)

21.Design an asynchronous sequential circuit that has 2 inputs X2 and X1 and one    output Z. When X1=0, the output Z is 0. The first change in X2 that occurs while X1 is 1 will cause output Z to be 1. The output Z will remain 1 until X1 returns to 0.


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